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Dr Brendan Mullane

Research Interests

Mixed-Signal/Digital Integrated Circuit Design,  CPU/DSP, System on Chip (SoC),  D/A & A/D Converters, Signal processing, Digital Assist Analog IC Calibration and Error Correction Techniques, ADC Built-in-Self-Test (BIST).

Professional Activities

Patent

  • 2017 US 9762258 B2 - Mismatch and inter symbol interference (ISI) shaping using dynamic element matching
  • 2013 US8386209 B2 - Testing system
  • 2004 US6785655 B1 - Method for independent dynamic range control
  • 2004 US 6782366 B1 - Method for independent dynamic range control

Committee

  • 2013 ISSC Program Committee , The Irish Signals and Systems Conference (ISSC) has become the premier conference in Ireland addressing all aspects of signals and systems. The conference focuses on Digital Signal Processing, Control, Communications, and related fields of ICT, and encompasses algorithm and system modelling, design, and implementation, for a broad range of applications.
  • 2011 MIDAS - Microlectrionics Industry Association Ireland,

Education

  • 2011 University of Limerick - PhD
  • 2006 University of Limerick - Masters by research
  • 1992 University of Limerick - B.Eng.

Association

  • 2006 member, IEEE - Advancing Technology for Humanity

Employment

  • 1996 LSI Logic, Japan - Snr. IC Design Engineer
  • 1995 Silicon Systems Design Ltd. - Snr. Design Enginner
  • 1992 ALPS Electric Co, Japan - Design Engineer

Language

  • Japanese

Outreach

  • Microelectronics Industry Association - Training Comittee member 2011~2013
  • Select Topics in Data Converters Workshop organizer (2015~)

Publications

Conference Publication

2019

2019 17th IEEE International New Circuits and Systems Conference (NEWCAS)
Shantanu Mehta ; Anthony G. Scanlan ; Brendan Mullane ; Daniel O'Hare
DOI: 10.1109/NEWCAS44328.2019.8961257

2014

IET Conference Publications
O'Brien V.;MacNamee C.;Mullane B.
DOI: 10.1049/cp.2014.0725

2014

IET Conference Publications
Nahlik J.;Mullane B.;Hospodka J.;Sovka P.;O'Hare D.
DOI: 10.1049/cp.2014.0724

2013

IEEE European Conference on Circuit Theory and Design, (ECCTD)
Hongjia Mo, Michael Peter Kennedy, Vincent O'Brien, Brendan Mullane
DOI: 10.1109/ECCTD.2013.6662198

2010

ECSI-2010 Silicon for Debug (S4D)
Mullane, Brendan,O'Brien, Vincent,MacNamee, Ciaran,Laumer, Michael

2009

Proceedings of the 19th ACM Great Lakes symposium on VLSI (GLVLSI)
Brendan Mullane, Ciaran MacNamee, Vincent O'Brien, Thomas Flesichmann
DOI: 10.1145/1531542.1531564

2008

DDECS2008 - Workshop on Design and Diagnostics of Electronic Systems
Michael Higgins,Ciaran MacNamee,Brendan Mullane
DDECS2008 - Workshop on Design and Diagnostics of Electronic Systems

2008
2007

NATW2007
Michael Higgins,Ciaran Macnamee,Brendan Mullane
NATW2007

2007

ReSCos2007
Brendan Mullane,Michael Higgins,Ciaran MacNamee,Chen-Huan Chiang,Tapan J Chakraborty,Thomas B Cook
ReSCos2007

2007

IT&T2007
Michael Higgins,Ciaran Macnamee,Brendan Mullane
IT&T2007

2006

IPSOC2006
Mullane, Brendan,MacNamee, Ciaran
IPSOC2006

Other Journal

Other Publication

2018

A Reduced Hardware ISI and Mismatch Shaping DEM Decoder (vol 37, pg 2229, 2018)
O'Brien, V;Scanlan, AG;Mullane, B
Circuits Systems And Signal Processing DOI: 10.1007/s00034-017-0718-z

2012

An FPGA Algorithm Development for an Improved Servo-Loop Method. To be published in Design and Diagnostics of Electronic Circuits and Systems, 2012. DDECS '12. IEEE
Židek, Jan,Mullane, Brendan,Subrt, Ondrej ,Martinek, Pravoslav
To be published in Design and Diagnostics of Electronic Circuits and Systems, 2012. DDECS '12. IEEE

2011

High Order Mismatch Noise Shaping for Bandpass DACs. Electronics, Circuits, and Systems (ICECS), 2011 18th IEEE International Conference on
O'Brien, Vincent,Mullane, Brendan
Electronics, Circuits, and Systems (ICECS), 2011 18th IEEE International Conference on

2009

A High Precision Analog Signal Generator Design for ADC BIST. European Test Symposium, 2009. ETS '09. 14th IEEE
O'Brien, Vincent,Mullane, Brendan,Fleischmann, Thomas,MacNamee, Ciaran
European Test Symposium, 2009. ETS '09. 14th IEEE

2009

A Low Cost On-Chip Design Platform for Static ADC Measurments. European Test Symposium, 2009. ETS '09. 14th IEEE
Mullane, Brendan,MacNamee, Ciaran,O'Brien, Vincent,Fleischmann, Thomas
European Test Symposium, 2009. ETS '09. 14th IEEE

2008

IEEE 1500 Wrapper Control using an IEEE 1149.1. Test Access Port. 16th IET Irish Signals and Systems Conference
Michael Higgins,Brendan Mullane,Ciaran MacNamee
16th IET Irish Signals and Systems Conference

2008

IEEE 1500 Core Wrapper Techniques and Implementation. 13th IEEE International Test Conference
Brendan Mullane,Michael Higgins,Ciaran MacNamee
13th IEEE International Test Conference

2008

An Optimal IEEE 1500 Core Wrapper Design for Improved Test Access and Reduced Test Time. 16th IET Irish Signals and Systems Conference
Brendan Mullane,Michael Higgins,Ciaran MacNamee
16th IET Irish Signals and Systems Conference

2007
2004

An ASIC Primer
Dunne, A; kelly, JB; Mullane, B; Kennedy, G

Peer Reviewed Journal

2020

High Order Mismatch Shaping for Low Oversampling Rates
O'Brien V.;Mullane B.
Ieee Transactions On Circuits And Systems Ii-Express Briefs DOI: 10.1109/TCSII.2019.2904180

2018

Bandwidth Enhancement to Continuous-Time Input Pipeline ADCs
Danie O'Hare, Anthony G. Scanlan, Eric Thompson, Brendan Mullane
Ieee Transactions On Very Large Scale Integration (Vlsi) Systems DOI: 10.1109/TVLSI.2017.2763129

2018

Performance optimization methods for switched-capacitor biquadratic filters
Nahlik, J;Hospodka, J;Sovka, P;Mullane, B;Subrt, O
Journal Of Electrical Engineering-Elektrotechnicky Casopis DOI: 10.2478/jee-2018-0050

2017

A Reduced Hardware ISI and Mismatch Shaping DEM Decoder
Vincent O'Brien, Anthony Scanlan, Brendan Mullane
Circuits Systems And Signal Processing DOI: 10.1007/s00034-017-0681-8

2017

Analysis of feedback predictive encoder based ADCs
Scanlan, Anthony and O'Hare, Daniel and Halton, Mark Keith and O'Brien, Vincent and Mullane, Brendan and Thompson, Eric
Compel-The International Journal For Computation And Mathematics In Electrical And Electronic Engineering DOI: 10.1108/COMPEL-12-2015-0464

Published Report

2004