Biography

Brendan Mullane received his BEng. degree in Electronic Engineering from the University of Limerick, Ireland in 1992 and also completed his PhD degree in System-on-Chip Data Converter Built-in-Self-Test in 2010 also from the University of Limerick.

From 1992 to 1995 he worked with Alps Electric (Japan) as a Junior Design Engineer and with LSI Logic (Japan) from 1996 to 2002 as a Senior IC Designer. He is currently a Senior Research Fellow in the Circuits and Systems Research Centre (CSRC) at the University of Limerick, Ireland and has been the principal investigator on a number of significant research projects. He is author of one book chapter and more than 30 articles and holds four patents. His research interests include high performance, low-power VLSI circuits for signal processing, DSP/CPU and data converters (DAC, ADC) applications including digital assist analog IC calibration and Built-in-Self-Test (BIST) research activities. He is also interested in biomedical signal processing for neuroscience applications.

Research Interests

Digital Signal Processing (DSP) and CPU processors, System on Chip (SoC) and VLSI design, Data Converters, Digital Assist Analogue Calibration and DEM Error Correction Techniques, ADC Built-in-Self-Test (BIST), Bio-electronics for Neuroscience.

Professional Activities

Patent

  • 2017 US 9762258 B2 - Mismatch and inter symbol interference (ISI) shaping using dynamic element matching
  • 2013 US8386209 B2 - Testing system
  • 2004 US6785655 B1 - Method for independent dynamic range control
  • 2004 US 6782366 B1 - Method for independent dynamic range control

Committee

  • 2013 ISSC Program Committee , The Irish Signals and Systems Conference (ISSC) has become the premier conference in Ireland addressing all aspects of signals and systems. The conference focuses on Digital Signal Processing, Control, Communications, and related fields of ICT, and encompasses algorithm and system modelling, design, and implementation, for a broad range of applications.
  • 2011 MIDAS - Microlectrionics Industry Association Ireland,

Education

  • 2011 University of Limerick - PhD
  • 2006 University of Limerick - Masters by research
  • 1992 University of Limerick - B.Eng.

Association

  • 2006 member, IEEE - Advancing Technology for Humanity

Employment

  • 1996 LSI Logic, Japan - Snr. IC Design Engineer
  • 1995 Silicon Systems Design Ltd. - Snr. Design Enginner
  • 1992 ALPS Electric Co, Japan - Design Engineer

Language

  • Japanese

Outreach

  • Microelectronics Industry Association - Training Comittee member 2011~2013
  • Select Topics in Data Converters Workshop organizer (2015~)

Peer Reviewed Journals

2020

High Order Mismatch Shaping for Low Oversampling Rates

O'Brien V.;Mullane B. (2020) High Order Mismatch Shaping for Low Oversampling Rates. Ieee Transactions On Circuits And Systems Ii-Express Briefs :42-46

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2018

Bandwidth Enhancement to Continuous-Time Input Pipeline ADCs

Danie O'Hare, Anthony G. Scanlan, Eric Thompson, Brendan Mullane (2018) Bandwidth Enhancement to Continuous-Time Input Pipeline ADCs. IEEE Ieee Transactions On Very Large Scale Integration (Vlsi) Systems :404-415

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2018

Performance optimization methods for switched-capacitor biquadratic filters

Nahlik, J;Hospodka, J;Sovka, P;Mullane, B;Subrt, O (2018) Performance optimization methods for switched-capacitor biquadratic filters. BRATISLAVA : SLOVAK UNIV TECHNOLOGY Journal Of Electrical Engineering-Elektrotechnicky Casopis :345-351

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2017

A Reduced Hardware ISI and Mismatch Shaping DEM Decoder

Vincent O'Brien, Anthony Scanlan, Brendan Mullane (2017) A Reduced Hardware ISI and Mismatch Shaping DEM Decoder. Circuits Systems And Signal Processing

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2017

Analysis of feedback predictive encoder based ADCs

Scanlan, Anthony and O'Hare, Daniel and Halton, Mark Keith and O'Brien, Vincent and Mullane, Brendan and Thompson, Eric (2017) Analysis of feedback predictive encoder based ADCs. Compel-The International Journal For Computation And Mathematics In Electrical And Electronic Engineering :129-152

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2014

Investigation of a Superscalar Operand Stack Using FO4 and ASIC Wire-Delay Metrics

Bailey C.;Mullane B. (2014) Investigation of a Superscalar Operand Stack Using FO4 and ASIC Wire-Delay Metrics. Vlsi Design

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2010

Design and implementation challenges for adoption of the IEEE 1500 standard

Higgins, M; MacNamee, C; Mullane, B (2010) Design and implementation challenges for adoption of the IEEE 1500 standard. Iet Computers And Digital Techniques :38-49

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Books

This author has not written any publications of this type yet.

Book Chapters

2012

A 100dB SFDR 0.5V pk-pk band-pass DAC implemented on a Low Voltage CMOS Process

Brendan Mullane,Vincent O'Brien (2012) A 100dB SFDR 0.5V pk-pk band-pass DAC implemented on a Low Voltage CMOS Process. Berlin, Germany : Springer VLSI-SoC: Advanced Research for Systems on Chip :144-157

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Edited Books

This author has not written any publications of this type yet.

Other Journals

2021

Comparison of High-Order Programmable Mismatch Shaping Bandpass DEM Implementations Applicable to Nyquist-Rate D/A Converters

Shantanu Mehta, Roberto Pelliconi, Christophe Erdmann, Vincent O'Brien, Brendan Mullane, (2021) Comparison of High-Order Programmable Mismatch Shaping Bandpass DEM Implementations Applicable to Nyquist-Rate D/A Converters. IEEE Open Journal of Circuits and Systems :597-610

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2020

Analysis and Design of a Tri-Level Current-Steering DAC With 12-Bit Linearity and Improved Impedance Matching Suitable for CT-ADCs

S. Mehta, D. O'Hare, V. O'Brien, E. Thompson, B. Mullane (2020) Analysis and Design of a Tri-Level Current-Steering DAC With 12-Bit Linearity and Improved Impedance Matching Suitable for CT-ADCs. IEEE Open Journal of Circuits and Systems :34-47

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2014

Investigation of a Superscalar Operand Stack Using FO4 and ASIC Wire-Delay Metrics

Christopher Bailey, Brendan Mullane (2014) Investigation of a Superscalar Operand Stack Using FO4 and ASIC Wire-Delay Metrics. : Hindawi Publishing Corporation VLSI Design

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Conference Publications

2021

2021 IEEE Biomedical Circuits and Systems Conference (BioCAS)

Fotios Kostarelos, Ciaran MacNamee, Brendan Mullane (2021) 2021 IEEE Biomedical Circuits and Systems Conference (BioCAS).

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2021

2021 IEEE International Symposium on Circuits and Systems (ISCAS)

Mehta, Shantanu and Mullane, Brendan and O'Brien, Vincent and Pelliconi, Roberto and Erdmann, Christophe (2021) 2021 IEEE International Symposium on Circuits and Systems (ISCAS). :1-5

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2020

2020 27th IEEE International Conference on Electronics, Circuits and Systems (ICECS)

S. Mehta, B. Mullane, V. O'Brien, R. Pelliconi and C. Erdmann (2020) 2020 27th IEEE International Conference on Electronics, Circuits and Systems (ICECS). :1-4

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2019

Midwest Symposium on Circuits and Systems

Mullane B.;O'Brien V. (2019) Midwest Symposium on Circuits and Systems. :591-594

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2019

2019 17th IEEE International New Circuits and Systems Conference (NEWCAS)

Shantanu Mehta ; Anthony G. Scanlan ; Brendan Mullane ; Daniel O'Hare (2019) 2019 17th IEEE International New Circuits and Systems Conference (NEWCAS).

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2018

IEEE 61st International Midwest Symposium on Circuits and Systems (MWSCAS)

Brendan Mullane, Vincent O'Brien (2018) IEEE 61st International Midwest Symposium on Circuits and Systems (MWSCAS).

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2014

IET Conference Publications

O'Brien V.;MacNamee C.;Mullane B. (2014) IET Conference Publications. :418-423

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2014

25th IET Irish Signals & Systems Conference 2014 and 2014 China-Ireland International Conference on Information and Communications Technologies (ISSC 2014/CIICT 2014).

Nahlik, J.; Mullane, B.; Hospodka, J.; Sovka, P.; O'Hare, D (2014) 25th IET Irish Signals & Systems Conference 2014 and 2014 China-Ireland International Conference on Information and Communications Technologies (ISSC 2014/CIICT 2014)..

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2014

25th IET Irish Signals & Systems Conference 2014 and 2014 China-Ireland International Conference on Information and Communications Technologies (ISSC 2014/CIICT 2014).

O'Brien, V.; MacNamee, C.; Mullane, B. (2014) 25th IET Irish Signals & Systems Conference 2014 and 2014 China-Ireland International Conference on Information and Communications Technologies (ISSC 2014/CIICT 2014).. :418-423

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2014

IET Conference Publications

Nahlik J.;Mullane B.;Hospodka J.;Sovka P.;O'Hare D. (2014) IET Conference Publications. :412-417

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2013

IEEE European Conference on Circuit Theory and Design, (ECCTD)

Hongjia Mo, Michael Peter Kennedy, Vincent O'Brien, Brendan Mullane (2013) IEEE European Conference on Circuit Theory and Design, (ECCTD) .

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2013

2013 European Conference on Circuit Theory and Design, ECCTD 2013 - Proceedings

Mo H.;Kennedy M.;O'Brien V.;Mullane B. (2013) 2013 European Conference on Circuit Theory and Design, ECCTD 2013 - Proceedings.

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2012

IFIP Advances in Information and Communication Technology

Mullane B.;O'Brien V. (2012) IFIP Advances in Information and Communication Technology. :144-157

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2011

IEEE International Conference on Electronics, Circuits and Systems, (ICECS)

O'Brien, V.; Mullane, B (2011) IEEE International Conference on Electronics, Circuits and Systems, (ICECS).

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2011

IEEE/IFIP 19th International Conference on VLSI and System-on-Chip (VLSI-SoC)

Mullane, Brendan,O'Brien, Vincent (2011) IEEE/IFIP 19th International Conference on VLSI and System-on-Chip (VLSI-SoC).

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2010

ECSI-2010 Silicon for Debug (S4D)

Mullane, Brendan,O'Brien, Vincent,MacNamee, Ciaran,Laumer, Michael (2010) ECSI-2010 Silicon for Debug (S4D).

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2009

IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems, (DDECS)

Mullane, B; OBrien, V; MacNamee, C; Fleischmann, T (2009) IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems, (DDECS) . :4-7

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2009

IEEE International SOC Conference, (SOCC)

Mullane B., O'Brien V., MacNamee C., Fleischmann T. (2009) IEEE International SOC Conference, (SOCC). :169-172

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2009

Proceedings of the 19th ACM Great Lakes symposium on VLSI (GLVLSI)

Brendan Mullane, Ciaran MacNamee, Vincent O'Brien, Thomas Flesichmann (2009) Proceedings of the 19th ACM Great Lakes symposium on VLSI (GLVLSI).

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2009

International Test Conference, (ITC)

Mullane B., O'Brien V., MacNamee C., Fleischmann T. (2009) International Test Conference, (ITC).

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2009

Proceedings of the 2009 IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems, DDECS 2009

Mullane B., O'Brien V., MacNamee C., Fleischmann T. (2009) Proceedings of the 2009 IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems, DDECS 2009. :4-7

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2009

IEEE European Test Symposium, (ETS)

Mullane B., MacNamee C., O'Brien V., and Fleischmann T. (2009) IEEE European Test Symposium, (ETS).

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2008

IET Conference Publications

Higgins M., MacNamee C., Mullane B. (2008) IET Conference Publications. :198-203

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2008

2008 IEEE INTERNATIONAL TEST CONFERENCE, VOLS 1 AND 2, PROCEEDINGS

Mullane, B; Higgins, M; MacNamee, C (2008) 2008 IEEE INTERNATIONAL TEST CONFERENCE, VOLS 1 AND 2, PROCEEDINGS. :747-756

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2008

PROCEEDINGS OF THE 12TH WSEAS INTERNATIONAL CONFERENCE ON CIRCUITS

Fleischmann, T; Mullane, B (2008) PROCEEDINGS OF THE 12TH WSEAS INTERNATIONAL CONFERENCE ON CIRCUITS. :456-461

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2008

2008 IEEE WORKSHOP ON DESIGN AND DIAGNOSTICS OF ELECTRONIC CIRCUITS AND SYSTEMS, PROCEEDINGS

Higgins, M; MacNamee, C; Mullane, B (2008) 2008 IEEE WORKSHOP ON DESIGN AND DIAGNOSTICS OF ELECTRONIC CIRCUITS AND SYSTEMS, PROCEEDINGS. :326-331

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2008

Proceedings - International Test Conference

Mullane B.;Higgins M.;MacNamee C. (2008) Proceedings - International Test Conference.

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2008

DDECS2008 - Workshop on Design and Diagnostics of Electronic Systems

Michael Higgins,Ciaran MacNamee,Brendan Mullane (2008) DDECS2008 - Workshop on Design and Diagnostics of Electronic Systems. : IEEEIEEE DDECS2008 - Workshop on Design and Diagnostics of Electronic Systems

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2008

Proceedings - IEEE Computer Society Annual Symposium on VLSI: Trends in VLSI Technology and Design, ISVLSI 2008

Higgins M., MacNamee C., Mullane B. (2008) Proceedings - IEEE Computer Society Annual Symposium on VLSI: Trends in VLSI Technology and Design, ISVLSI 2008. :145-150

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2008

IET Conference Publications

Mullane B., Higgins M., MacNamee C. (2008) IET Conference Publications. :204-209

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2007

ReSCos2007

Brendan Mullane,Michael Higgins,Ciaran MacNamee,Chen-Huan Chiang,Tapan J Chakraborty,Thomas B Cook (2007) ReSCos2007. ReSCos2007

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2007

IT&T2007

Michael Higgins,Ciaran Macnamee,Brendan Mullane (2007) IT&T2007. IT&T2007

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2007

NATW2007

Michael Higgins,Ciaran Macnamee,Brendan Mullane (2007) NATW2007. NATW2007

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2006

IPSOC2006

Mullane, Brendan,MacNamee, Ciaran (2006) IPSOC2006. IPSOC2006

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Conference Contributions

This author has not written any publications of this type yet.

Published Reports

2004

An ASIC primer - "Everything you ever wanted to know about ASICs but were afraid to ask"

Alan Dunne,Brendan Mullane ,John Kelly,Gerard Kennedy (2004) An ASIC primer - "Everything you ever wanted to know about ASICs but were afraid to ask". : Shannon Development TechwatchShannon Development Techwatch

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2002

High Performance Processor IP and AMBA Core Infrastructure

Brendan Mullane (2002) High Performance Processor IP and AMBA Core Infrastructure. : ARM Developer's Guide, Toyko, JapanARM Developer's Guide, Toyko, Japan

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2002

High Performance Processor IP and AMBA Core Infrastructure

Brendan Mullane (2002) High Performance Processor IP and AMBA Core Infrastructure. : ARM Developer's Guide, Toyko, JapanARM Developer's Guide, Toyko, Japan

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Editorials

This author has not written any publications of this type yet.

Book Reviews

This author has not written any publications of this type yet.

Other Publications

2018

A Reduced Hardware ISI and Mismatch Shaping DEM Decoder (vol 37, pg 2229, 2018)

O'Brien, V;Scanlan, AG;Mullane, B (2018) A Reduced Hardware ISI and Mismatch Shaping DEM Decoder (vol 37, pg 2229, 2018). NEW YORK : SPRINGER BIRKHAUSER Circuits Systems And Signal Processing :2318-2319

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2009

A High Precision Analog Signal Generator Design for ADC BIST. European Test Symposium, 2009. ETS '09. 14th IEEE

O'Brien, Vincent,Mullane, Brendan,Fleischmann, Thomas,MacNamee, Ciaran (2009) A High Precision Analog Signal Generator Design for ADC BIST. European Test Symposium, 2009. ETS '09. 14th IEEE. European Test Symposium, 2009. ETS '09. 14th IEEE :125-130

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2009

A Low Cost On-Chip Design Platform for Static ADC Measurments. European Test Symposium, 2009. ETS '09. 14th IEEE

Mullane, Brendan,MacNamee, Ciaran,O'Brien, Vincent,Fleischmann, Thomas (2009) A Low Cost On-Chip Design Platform for Static ADC Measurments. European Test Symposium, 2009. ETS '09. 14th IEEE. European Test Symposium, 2009. ETS '09. 14th IEEE :125-130

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2009

An On-Chip Test System for Dynamic ADC Parameters

Thomas Fleischmann (2009) An On-Chip Test System for Dynamic ADC Parameters. : University of LimerickUniversity of Limerick

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2008

IEEE 1500 Wrapper Control using an IEEE 1149.1. Test Access Port. 16th IET Irish Signals and Systems Conference

Michael Higgins,Brendan Mullane,Ciaran MacNamee (2008) IEEE 1500 Wrapper Control using an IEEE 1149.1. Test Access Port. 16th IET Irish Signals and Systems Conference. UCG Galway, IrelandUCG Galway, Ireland 16th IET Irish Signals and Systems Conference

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2008

An Optimal IEEE 1500 Core Wrapper Design for Improved Test Access and Reduced Test Time. 16th IET Irish Signals and Systems Conference

Brendan Mullane,Michael Higgins,Ciaran MacNamee (2008) An Optimal IEEE 1500 Core Wrapper Design for Improved Test Access and Reduced Test Time. 16th IET Irish Signals and Systems Conference. UCG Galway, IrelandUCG Galway, Ireland 16th IET Irish Signals and Systems Conference

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2007

Developing a Reusable IP Platform for a System-on-Chip Design Framework. KIPEX Monthly Magazine

Mullane, Brendan,MacNamee, Ciaran (2007) Developing a Reusable IP Platform for a System-on-Chip Design Framework. KIPEX Monthly Magazine. KoreaKorea : Korean Semiconductor IP ExchangeKorean Semiconductor IP Exchange KIPEX Monthly Magazine

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2007

Developing a Reusable IP Platform within a System-on-Chip Design Framework targeted towards an Academic R&D Environment

Mullane, B; MacNamee, C (2007) Developing a Reusable IP Platform within a System-on-Chip Design Framework targeted towards an Academic R&D Environment. : Korean Semiconductor IP Exchange

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2007

Optimisation and Control of IEEE 1500 Wrappers and User Defined TAMs

Higgins, M; MacNamee, C; Mullane, B (2007) Optimisation and Control of IEEE 1500 Wrappers and User Defined TAMs. Blanchardstown : Blanchardstown IT

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2007

FPGA PROTOTYPING OF A SCAN BASED SYSTEM-ON-CHIP DESIGN

Mullane, B; Higgins, M; MacNamee, C; Chen-Huan Chiang; Chakraborty, TJ; Cook, TB (2007) FPGA PROTOTYPING OF A SCAN BASED SYSTEM-ON-CHIP DESIGN. Montpellier

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2007

Optimisation of IEEE 1500 Wrappers and User Defined TAMs

Higgins, M; Macnamee, C; Mullane, B (2007) Optimisation of IEEE 1500 Wrappers and User Defined TAMs. Boxborough, MA, USA : IEEE

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2006

Establishing a Platform for the Development of Reusable IP within a System-on-Chip Design Framework

Mullane, B (2006) Establishing a Platform for the Development of Reusable IP within a System-on-Chip Design Framework. Universityof Limerick

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2006

Developing a Reusable IP Platform within a System-on-Chip Design Framework targeted towards an Academic R&D Environment

Mullane, B; MacNamee, C (2006) Developing a Reusable IP Platform within a System-on-Chip Design Framework targeted towards an Academic R&D Environment. Grenoble, France : Design & Reuse

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2004

Digital Issues in Mixed Signal ASIC Design

Brendan Mullane (2004) Digital Issues in Mixed Signal ASIC Design. : UL Technology Transfer Initiative Seminar on Mixed Signal ASIC DesignUL Technology Transfer Initiati

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2004

Technology Transfer Initiative

Mullane, B; Scanlan, T; Kelly, JB; Kennedy, G (2004) Technology Transfer Initiative. American Journal Of Pharmaceutical Education

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2004

An ASIC Primer

Dunne, A; kelly, JB; Mullane, B; Kennedy, G (2004) An ASIC Primer.

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2001

AMBA SoC and ARM IP Infrastructure

Mullane, B (2001) AMBA SoC and ARM IP Infrastructure.

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