Dr. Brendan Mullane

High Order Mismatch Shaping for Low Oversampling Rates
O'Brien V.;Mullane B.
(2020) High Order Mismatch Shaping for Low Oversampling Rates
In Ieee Transactions On Circuits And Systems Ii-Express Briefs; pp. 42-46
DOI: 10.1109/TCSII.2019.2904180
[ULIR]

Bandwidth Enhancement to Continuous-Time Input Pipeline ADCs
Danie O'Hare, Anthony G. Scanlan, Eric Thompson, Brendan Mullane
(2018) Bandwidth Enhancement to Continuous-Time Input Pipeline ADCs
In Ieee Transactions On Very Large Scale Integration (Vlsi) Systems; IEEE : pp. 404-415
DOI: 10.1109/TVLSI.2017.2763129
[ULIR]

Performance optimization methods for switched-capacitor biquadratic filters
Nahlik, J;Hospodka, J;Sovka, P;Mullane, B;Subrt, O
(2018) Performance optimization methods for switched-capacitor biquadratic filters
In Journal Of Electrical Engineering-Elektrotechnicky Casopis; BRATISLAVA : SLOVAK UNIV TECHNOLOGY pp. 345-351
DOI: 10.2478/jee-2018-0050

Analysis of feedback predictive encoder based ADCs
Scanlan, Anthony and O'Hare, Daniel and Halton, Mark Keith and O'Brien, Vincent and Mullane, Brendan and Thompson, Eric
(2017) Analysis of feedback predictive encoder based ADCs
In Compel-The International Journal For Computation And Mathematics In Electrical And Electronic Engineering; pp. 129-152
DOI: 10.1108/COMPEL-12-2015-0464
[ULIR]

A Reduced Hardware ISI and Mismatch Shaping DEM Decoder
Vincent O'Brien, Anthony Scanlan, Brendan Mullane
(2017) A Reduced Hardware ISI and Mismatch Shaping DEM Decoder
In Circuits Systems And Signal Processing;
DOI: 10.1007/s00034-017-0681-8
[ULIR]

Investigation of a Superscalar Operand Stack Using FO4 and ASIC Wire-Delay Metrics
Bailey C.;Mullane B.
(2014) Investigation of a Superscalar Operand Stack Using FO4 and ASIC Wire-Delay Metrics
In Vlsi Design;
DOI: 10.1155/2014/493189

Design and implementation challenges for adoption of the IEEE 1500 standard
Higgins, M; MacNamee, C; Mullane, B
(2010) Design and implementation challenges for adoption of the IEEE 1500 standard
In Iet Computers And Digital Techniques; pp. 38-49
DOI: 10.1049/iet-cdt.2008.0141

Analysis and Design of a Tri-Level Current-Steering DAC With 12-Bit Linearity and Improved Impedance Matching Suitable for CT-ADCs
S. Mehta, D. O'Hare, V. O'Brien, E. Thompson, B. Mullane
(2020) Analysis and Design of a Tri-Level Current-Steering DAC With 12-Bit Linearity and Improved Impedance Matching Suitable for CT-ADCs
In IEEE Open Journal of Circuits and Systems; pp. 34-47
DOI: 10.1109/OJCAS.2020.2994838
[ULIR]

Investigation of a Superscalar Operand Stack Using FO4 and ASIC Wire-Delay Metrics
Christopher Bailey, Brendan Mullane
(2014) Investigation of a Superscalar Operand Stack Using FO4 and ASIC Wire-Delay Metrics
In VLSI Design; Hindawi Publishing Corporation
DOI: http://dx.doi.org/10.1155/2014/493189
[ULIR]

2021 IEEE International Symposium on Circuits and Systems (ISCAS)
Mehta, Shantanu and Mullane, Brendan and O'Brien, Vincent and Pelliconi, Roberto and Erdmann, Christophe
(2021) 2021 IEEE International Symposium on Circuits and Systems (ISCAS)
pp. 1-5
DOI: 10.1109/ISCAS51556.2021.9401729
[ULIR]

2020 27th IEEE International Conference on Electronics, Circuits and Systems (ICECS)
S. Mehta, B. Mullane, V. O'Brien, R. Pelliconi and C. Erdmann
(2020) 2020 27th IEEE International Conference on Electronics, Circuits and Systems (ICECS)
pp. 1-4
DOI: 10.1109/ICECS49266.2020.9294912
[ULIR]

Midwest Symposium on Circuits and Systems
Mullane B.;O'Brien V.
(2019) Midwest Symposium on Circuits and Systems
pp. 591-594
DOI: 10.1109/MWSCAS.2018.8623967
[ULIR]

2019 17th IEEE International New Circuits and Systems Conference (NEWCAS)
Shantanu Mehta ; Anthony G. Scanlan ; Brendan Mullane ; Daniel O'Hare
(2019) 2019 17th IEEE International New Circuits and Systems Conference (NEWCAS)
Munich, Germany
DOI: 10.1109/NEWCAS44328.2019.8961257
[ULIR]

IEEE 61st International Midwest Symposium on Circuits and Systems (MWSCAS)
Brendan Mullane, Vincent O'Brien
(2018) IEEE 61st International Midwest Symposium on Circuits and Systems (MWSCAS)

[ULIR]

25th IET Irish Signals & Systems Conference 2014 and 2014 China-Ireland International Conference on Information and Communications Technologies (ISSC 2014/CIICT 2014).
O'Brien, V.; MacNamee, C.; Mullane, B.
(2014) 25th IET Irish Signals & Systems Conference 2014 and 2014 China-Ireland International Conference on Information and Communications Technologies (ISSC 2014/CIICT 2014).
pp. 418-423 Limerick, Ireland
DOI: 10.1049/cp.2014.0725

IET Conference Publications
O'Brien V.;MacNamee C.;Mullane B.
(2014) IET Conference Publications
pp. 418-423
DOI: 10.1049/cp.2014.0725

25th IET Irish Signals & Systems Conference 2014 and 2014 China-Ireland International Conference on Information and Communications Technologies (ISSC 2014/CIICT 2014).
Nahlik, J.; Mullane, B.; Hospodka, J.; Sovka, P.; O'Hare, D
(2014) 25th IET Irish Signals & Systems Conference 2014 and 2014 China-Ireland International Conference on Information and Communications Technologies (ISSC 2014/CIICT 2014).
Limerick
DOI: doi: 10.1049/cp.2014.0724

IET Conference Publications
Nahlik J.;Mullane B.;Hospodka J.;Sovka P.;O'Hare D.
(2014) IET Conference Publications
pp. 412-417
DOI: 10.1049/cp.2014.0724

IEEE European Conference on Circuit Theory and Design, (ECCTD)
Hongjia Mo, Michael Peter Kennedy, Vincent O'Brien, Brendan Mullane
(2013) IEEE European Conference on Circuit Theory and Design, (ECCTD)
IEEE(Ed.) Dresden
DOI: 10.1109/ECCTD.2013.6662198

2013 European Conference on Circuit Theory and Design, ECCTD 2013 - Proceedings
Mo H.;Kennedy M.;O'Brien V.;Mullane B.
(2013) 2013 European Conference on Circuit Theory and Design, ECCTD 2013 - Proceedings

IFIP Advances in Information and Communication Technology
Mullane B.;O'Brien V.
(2012) IFIP Advances in Information and Communication Technology
pp. 144-157
DOI: 10.1007/978-3-642-32770-4_9

IEEE/IFIP 19th International Conference on VLSI and System-on-Chip (VLSI-SoC)
Mullane, Brendan,O'Brien, Vincent
(2011) IEEE/IFIP 19th International Conference on VLSI and System-on-Chip (VLSI-SoC)
IEEE(Ed.) Hong Kong
DOI: 10.1109/VLSISoC.2011.6081601

IEEE International Conference on Electronics, Circuits and Systems, (ICECS)
O'Brien, V.; Mullane, B
(2011) IEEE International Conference on Electronics, Circuits and Systems, (ICECS)
IEEE(Ed.)
DOI: 10.1109/ICECS.2011.6122254

ECSI-2010 Silicon for Debug (S4D)
Mullane, Brendan,O'Brien, Vincent,MacNamee, Ciaran,Laumer, Michael
(2010) ECSI-2010 Silicon for Debug (S4D)

IEEE European Test Symposium, (ETS)
Mullane B., MacNamee C., O'Brien V., and Fleischmann T.
(2009) IEEE European Test Symposium, (ETS)

IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems, (DDECS)
Mullane, B; OBrien, V; MacNamee, C; Fleischmann, T
(2009) IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems, (DDECS)
pp. 4-7

IEEE International SOC Conference, (SOCC)
Mullane B., O'Brien V., MacNamee C., Fleischmann T.
(2009) IEEE International SOC Conference, (SOCC)
pp. 169-172
DOI: 10.1109/SOCCON.2009.5398065

International Test Conference, (ITC)
Mullane B., O'Brien V., MacNamee C., Fleischmann T.
(2009) International Test Conference, (ITC)

DOI: 10.1109/TEST.2009.5355722

Proceedings of the 2009 IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems, DDECS 2009
Mullane B., O'Brien V., MacNamee C., Fleischmann T.
(2009) Proceedings of the 2009 IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems, DDECS 2009
pp. 4-7
DOI: 10.1109/DDECS.2009.5012087

Proceedings of the 19th ACM Great Lakes symposium on VLSI (GLVLSI)
Brendan Mullane, Ciaran MacNamee, Vincent O'Brien, Thomas Flesichmann
(2009) Proceedings of the 19th ACM Great Lakes symposium on VLSI (GLVLSI)
Boston, MA, USA
DOI: 10.1145/1531542.1531564

2008 IEEE WORKSHOP ON DESIGN AND DIAGNOSTICS OF ELECTRONIC CIRCUITS AND SYSTEMS, PROCEEDINGS
Higgins, M; MacNamee, C; Mullane, B
(2008) 2008 IEEE WORKSHOP ON DESIGN AND DIAGNOSTICS OF ELECTRONIC CIRCUITS AND SYSTEMS, PROCEEDINGS
pp. 326-331

IET Conference Publications
Mullane B., Higgins M., MacNamee C.
(2008) IET Conference Publications
pp. 204-209
DOI: 10.1049/cp:20080663

IET Conference Publications
Higgins M., MacNamee C., Mullane B.
(2008) IET Conference Publications
pp. 198-203
DOI: 10.1049/cp:20080662

Proceedings - International Test Conference
Mullane B.;Higgins M.;MacNamee C.
(2008) Proceedings - International Test Conference

DOI: 10.1109/TEST.2008.4700629

2008 IEEE INTERNATIONAL TEST CONFERENCE, VOLS 1 AND 2, PROCEEDINGS
Mullane, B; Higgins, M; MacNamee, C
(2008) 2008 IEEE INTERNATIONAL TEST CONFERENCE, VOLS 1 AND 2, PROCEEDINGS
pp. 747-756

DDECS2008 - Workshop on Design and Diagnostics of Electronic Systems
Michael Higgins,Ciaran MacNamee,Brendan Mullane
(2008) DDECS2008 - Workshop on Design and Diagnostics of Electronic Systems
In DDECS2008 - Workshop on Design and Diagnostics of Electronic Systems; IEEEIEEE Slovakia

PROCEEDINGS OF THE 12TH WSEAS INTERNATIONAL CONFERENCE ON CIRCUITS
Fleischmann, T; Mullane, B
(2008) PROCEEDINGS OF THE 12TH WSEAS INTERNATIONAL CONFERENCE ON CIRCUITS
pp. 456-461

Proceedings - IEEE Computer Society Annual Symposium on VLSI: Trends in VLSI Technology and Design, ISVLSI 2008
Higgins M., MacNamee C., Mullane B.
(2008) Proceedings - IEEE Computer Society Annual Symposium on VLSI: Trends in VLSI Technology and Design, ISVLSI 2008
pp. 145-150
DOI: 10.1109/ISVLSI.2008.36

ReSCos2007
Brendan Mullane,Michael Higgins,Ciaran MacNamee,Chen-Huan Chiang,Tapan J Chakraborty,Thomas B Cook
(2007) ReSCos2007
In ReSCos2007; Montpellier, France

IT&T2007
Michael Higgins,Ciaran Macnamee,Brendan Mullane
(2007) IT&T2007
In IT&T2007; Blanchardstown, Dublin

NATW2007
Michael Higgins,Ciaran Macnamee,Brendan Mullane
(2007) NATW2007
In NATW2007; Boston

IPSOC2006
Mullane, Brendan,MacNamee, Ciaran
(2006) IPSOC2006
In IPSOC2006; Grenoble France

An ASIC primer - "Everything you ever wanted to know about ASICs but were afraid to ask"
Alan Dunne,Brendan Mullane ,John Kelly,Gerard Kennedy
(2004) An ASIC primer - "Everything you ever wanted to know about ASICs but were afraid to ask"
Shannon Development TechwatchShannon Development Techwatch

High Performance Processor IP and AMBA Core Infrastructure
Brendan Mullane
(2002) High Performance Processor IP and AMBA Core Infrastructure
ARM Developer's Guide, Toyko, JapanARM Developer's Guide, Toyko, Japan

High Performance Processor IP and AMBA Core Infrastructure
Brendan Mullane
(2002) High Performance Processor IP and AMBA Core Infrastructure
ARM Developer's Guide, Toyko, JapanARM Developer's Guide, Toyko, Japan

A Reduced Hardware ISI and Mismatch Shaping DEM Decoder (vol 37, pg 2229, 2018)
O'Brien, V;Scanlan, AG;Mullane, B
(2018) A Reduced Hardware ISI and Mismatch Shaping DEM Decoder (vol 37, pg 2229, 2018)
In Circuits Systems And Signal Processing; NEW YORK : SPRINGER BIRKHAUSER pp. 2318-2319
DOI: 10.1007/s00034-017-0718-z

A Low Cost On-Chip Design Platform for Static ADC Measurments. European Test Symposium, 2009. ETS '09. 14th IEEE
Mullane, Brendan,MacNamee, Ciaran,O'Brien, Vincent,Fleischmann, Thomas
(2009) A Low Cost On-Chip Design Platform for Static ADC Measurments. European Test Symposium, 2009. ETS '09. 14th IEEE
In European Test Symposium, 2009. ETS '09. 14th IEEE; pp. 125-130

A High Precision Analog Signal Generator Design for ADC BIST. European Test Symposium, 2009. ETS '09. 14th IEEE
O'Brien, Vincent,Mullane, Brendan,Fleischmann, Thomas,MacNamee, Ciaran
(2009) A High Precision Analog Signal Generator Design for ADC BIST. European Test Symposium, 2009. ETS '09. 14th IEEE
In European Test Symposium, 2009. ETS '09. 14th IEEE; pp. 125-130

An Optimal IEEE 1500 Core Wrapper Design for Improved Test Access and Reduced Test Time. 16th IET Irish Signals and Systems Conference
Brendan Mullane,Michael Higgins,Ciaran MacNamee
(2008) An Optimal IEEE 1500 Core Wrapper Design for Improved Test Access and Reduced Test Time. 16th IET Irish Signals and Systems Conference
In 16th IET Irish Signals and Systems Conference; UCG Galway, IrelandUCG Galway, Ireland :

IEEE 1500 Wrapper Control using an IEEE 1149.1. Test Access Port. 16th IET Irish Signals and Systems Conference
Michael Higgins,Brendan Mullane,Ciaran MacNamee
(2008) IEEE 1500 Wrapper Control using an IEEE 1149.1. Test Access Port. 16th IET Irish Signals and Systems Conference
In 16th IET Irish Signals and Systems Conference; UCG Galway, IrelandUCG Galway, Ireland :

FPGA PROTOTYPING OF A SCAN BASED SYSTEM-ON-CHIP DESIGN
Mullane, B; Higgins, M; MacNamee, C; Chen-Huan Chiang; Chakraborty, TJ; Cook, TB
(2007) FPGA PROTOTYPING OF A SCAN BASED SYSTEM-ON-CHIP DESIGN
ReSCos2007(Ed.) Montpellier :

An On-Chip Test System for Dynamic ADC Parameters
Thomas Fleischmann
(2009) An On-Chip Test System for Dynamic ADC Parameters
University of LimerickUniversity of Limerick

Establishing a Platform for the Development of Reusable IP within a System-on-Chip Design Framework
Mullane, B
(2006) Establishing a Platform for the Development of Reusable IP within a System-on-Chip Design Framework
Universityof Limerick : Universityof Limerick

Optimisation and Control of IEEE 1500 Wrappers and User Defined TAMs
Higgins, M; MacNamee, C; Mullane, B
(2007) Optimisation and Control of IEEE 1500 Wrappers and User Defined TAMs
(Ed.) Blanchardstown : Blanchardstown IT Blanchardstown

Optimisation of IEEE 1500 Wrappers and User Defined TAMs
Higgins, M; Macnamee, C; Mullane, B
(2007) Optimisation of IEEE 1500 Wrappers and User Defined TAMs
(Ed.) Boxborough, MA, USA : IEEE Boxborough, MA, USA

Developing a Reusable IP Platform within a System-on-Chip Design Framework targeted towards an Academic R&D Environment
Mullane, B; MacNamee, C
(2007) Developing a Reusable IP Platform within a System-on-Chip Design Framework targeted towards an Academic R&D Environment
James K, Huh/KIPEX(Ed.) Korean Semiconductor IP Exchange

Developing a Reusable IP Platform for a System-on-Chip Design Framework. KIPEX Monthly Magazine
Mullane, Brendan,MacNamee, Ciaran
(2007) Developing a Reusable IP Platform for a System-on-Chip Design Framework. KIPEX Monthly Magazine
In KIPEX Monthly Magazine; KoreaKorea : Korean Semiconductor IP ExchangeKorean Semiconductor IP Exchange

Developing a Reusable IP Platform within a System-on-Chip Design Framework targeted towards an Academic R&D Environment
Mullane, B; MacNamee, C
(2006) Developing a Reusable IP Platform within a System-on-Chip Design Framework targeted towards an Academic R&D Environment
(Ed.) Grenoble, France : Design & Reuse Grenoble, France

An ASIC Primer
Dunne, A; kelly, JB; Mullane, B; Kennedy, G
(2004) An ASIC Primer

Technology Transfer Initiative
Mullane, B; Scanlan, T; Kelly, JB; Kennedy, G
(2004) Technology Transfer Initiative
In American Journal Of Pharmaceutical Education;

AMBA SoC and ARM IP Infrastructure
Mullane, B
(2001) AMBA SoC and ARM IP Infrastructure

Digital Issues in Mixed Signal ASIC Design
Brendan Mullane
(2004) Digital Issues in Mixed Signal ASIC Design
UL Technology Transfer Initiative Seminar on Mixed Signal ASIC DesignUL Technology Transfer Initiati