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High Speed Implementation of a SHA-3 Core on Virtex-5 and Virtex-6 FPGAs
Rao, M,Newe, T,Grout, I,Mathur, A
(2016)
High Speed Implementation of a SHA-3 Core on Virtex-5 and Virtex-6 FPGAs in Journal Of Circuits Systems And Computers 10.1142/S0218126616500699