Analysis and Design of a Tri-Level Current-Steering DAC With 12-Bit Linearity and Improved Impedance Matching Suitable for CT-ADCs
(2020)
Analysis and Design of a Tri-Level Current-Steering DAC With 12-Bit Linearity and Improved Impedance Matching Suitable for CT-ADCs in IEEE Open Journal of Circuits and Systems 10.1109/OJCAS.2020.2994838
Analysis and Design of a Tri-Level Current-Steering DAC With 12-Bit Linearity and Improved Impedance Matching Suitable for CT-ADCs in IEEE Open Journal of Circuits and Systems 10.1109/OJCAS.2020.2994838